【Member Papers】Electro-Thermal Co-Design β-Ga₂O₃ MOS-Type Trench Diode Based on Optimized Trench-Sidewall Interface Quality Strategy and Mechanism Study

      According to a report by China Economic Times, at the 2023 China Optical Valley Jiufengshan Forum and Compound Semiconductor Industry Conference, Academician Hao Yue of the Chinese Academy of Sciences stated that although oxide semiconductors still have some distance to go before large-scale industrial application, their broad application prospects are already clearly visible. Compared with gallium nitride (GaN) and silicon carbide (SiC), oxide semiconductors possess a wider bandgap, theoretically enabling lower conduction losses. However, heat dissipation remains a core bottleneck constraining their industrialization.

      Device-level electro-thermal characteristics and reliable physical data constitute an important prerequisite for constructing self-consistent electro-thermal coupling models of ultrawide bandgap (UWBG) semiconductor power devices, conducting steady and transient-state electro-thermal numerical simulations, and performing electro-thermal co-design optimization.  Associate Professor Li Yuan from the Faculty of Integrated Circuits at Xidian University has long focused on this critical scientific challenge. Targeting the core issue of device overheating that hinders the maturation of β-Ga₂O₃ power device technology, she has systematically overcome several key characterization and modeling technologies: time-domain thermo-reflectance (TDTR) optical characterization for precise extraction of unknown thermal properties of β-Ga₂O₃ devices, transient thermal imaging (TTI) thermo-reflectance imaging for complex transient electro-thermal characterization of β-Ga₂O₃ devices, and forward physical modeling of β-Ga₂O₃ device electro-thermal coupling integrating material，device and package analysis. On this basis, she has conducted a series of studies on electro-thermal co-design and thermal management system technologies for β-Ga₂O₃ MOS-type trench diodes, MOSFETs, and other devices, establishing a high-precision research framework for electro-thermal coupling modeling and co-optimization design of ultrawide bandgap semiconductor power devices.

      Her representative research include:

      An Electro-Thermal Co-Designed Ga₂O₃ [100] Trench Power Diode Featuring Ferroelectric Dielectric

      Electro-Thermal Co-Design β-Ga₂O₃ MOS-Type Trench Diode Based on Optimized Trench-Sidewall Interface Quality Strategy and Mechanism Study

      Implications for FD-OSIQ-Based Electrothermal Co-Design: Degradation of Reverse Performance in β-Ga₂O₃ Ferroelectric Trench Diodes Under Forward-Voltage Stress

      Electro-Thermal Improvement in a β-Ga₂O₃ Cage-Integrated Slanted-Fin MOSFET

      The Diamond-Plate Double-Side-Cooled β-Ga₂O₃ SBD Prototype with an Ultra-Low RθJC of 0.24 K/W

      This series of work breaks through the limitations of traditional single-physics-field design by deeply integrating the coupling mechanisms of electrical and thermal domains. It systematically reveals the physical mechanisms of electro-thermal-field interactions in β-Ga₂O₃ devices under steady- and transient- conditions, providing important theoretical support for device structure optimization, electro-thermal co-design, and improved operational robustness. The established research framework holds significant theoretical value and guiding importance for advancing the engineering application and industrialization of ultrawide bandgap semiconductor power devices.

      The following is a report on the second work of this series.

      Researchers from the Xidian University have published a dissertation titled " Electro-Thermal Co-Design β-Ga₂O₃ MOS-Type Trench Diode Based on Optimized Trench-Sidewall Interface Quality Strategy and Mechanism Study " in IEEE Journal of Emerging and Selected Topics in Power Electronics.

Background

      β-Ga₂O₃, as a leading candidate material for next-generation power electronic devices, possesses an ultrawide bandgap of 4.6-4.9 eV and a critical breakdown electric field as high as 8 MV/cm, significantly superior to GaN (~3.4 MV/cm) and SiC (~3.3 MV/cm). More importantly, high-quality β-Ga₂O₃ melt-grown substrates with cost advantages are already available on the market, laying the foundation for their large-scale industrial applications.

      For β-Ga₂O₃ diodes, the one-dimensional distribution of surface electric field in planar structures leads to limited leakage current management, making it difficult to approach the theoretical limit of Baliga's Figure of Merit (BFOM). MOS-type trench structures have become a research hotspot because they do not require p-type doping (intrinsic p-type doping in β-Ga₂O₃ is extremely difficult), and have successfully achieved excellent performance with breakdown voltages exceeding 2 kV and leakage currents below 1 μA/cm². However, the low thermal conductivity of β-Ga₂O₃ (10-20 times lower than GaN or SiC) causes self-heating effects that severely affect device reliability and stability, including degradation of mobility, saturation velocity, and breakdown voltage.

      β-Ga₂O₃ exhibits significant thermal conductivity anisotropy: the thermal conductivity of [100] direction trench sidewalls (k_T[010] = 27 W/mK @ 300 K) is 2.5 times that of [010] direction (k_T[100] = 10.9 W/mK @ 300 K). However, due to the sidewall orientation-dependent damage introduced by ICP dry etching increasing with trench angle, all published β-Ga₂O₃ MOS-type trench diodes to date adopt [010] direction trenches with low thermal conductivity, unable to utilize the high thermal conductivity advantage of [100] direction for electro-thermal co-design. How to solve the trench sidewall etching damage problem and achieve high performance of high thermal conductivity [100] direction trench devices has become a key bottleneck urgently needing breakthrough in the field of β-Ga₂O₃ power devices.

Abstract

      Currently, the published β-Ga₂O₃ MOS-Type trench diodes all use [010] trench sidewall with low thermal conductivity (k_T[100]) but rarely [100] trench sidewall with high thermal conductivity (k_T[010]). Because side-wall-orientation dependent etch damage increases gradually with the increase of trench angle ([010] trench as 0° rotation). For the first time, the optimized sidewall interface quality (OSIQ) strategy based on the ferroelectric material of PZT is applied to β-Ga₂O₃ trench diode (PSTD) to improve the trench sidewall interface quality for all trench-angle devices, which has verified OSIQ and its related electro-thermal optimization. The increasing trend of current density with different pre-voltage stress and pre-voltage stress time of PSTD are exhaustively investigated, and the [100] one shows a more improved and advantageous current rate compared to [010] one with the same chip size after the stress. Further, the mechanism of the proposed OSIQ has been revealed. This work can aid in the comprehensive improvement of the electro-thermal performance of the β-Ga₂O₃ trench device.

Highlights

      Pioneering Ferroelectric Material Optimization Strategy for Trench Interface: The optimized sidewall interface quality (OSIQ) strategy based on PZT ferroelectric material is proposed and verified for the first time, successfully solving the sidewall orientation-dependent etching damage problem in β-Ga₂O₃trench devices and breaking the technical limitation that only [010] direction trenches can be used.

      Realization of High Thermal Conductivity [100] Direction Trench Devices: Through the OSIQ strategy, [100] direction trench β-Ga₂O₃diodes with high thermal conductivity (27 W/mK) are realized for the first time. Under the same chip size, the current density of [100] PSTD is increased by 13.01% compared to [010] PSTD, while the current density of conventional HfO₂ dielectric [100] devices is 16.34% lower than [010] devices.

      Systematic Revelation of Ferroelectric Polarization Regulation Interface State Mechanism: Through MFM structure ferroelectric characterization, conductance method interface state density testing, and energy band structure analysis, the physical mechanism is systematically revealed that PZT ferroelectric dielectric generates built-in nonlinear polarization electric field under voltage stress, effectively reducing trench sidewall interface state density, decreasing carrier traps, thereby lowering the Schottky barrier and enhancing forward current.

      Quantitative Investigation of Voltage and Time-Dependent OSIQ Effects: The effects of different pre-voltage stresses (14-20 V) and stress times (2 ms-1 min) on device performance are quantitatively studied. It is found that voltage stress is the dominant factor of OSIQ effect. Under 20 V pre-voltage, the current density of [100] PSTD can reach 128.55% of the reference device, achieving significant electro-thermal co-optimization.

Conclusion

      For the first time, the OSIQ PSTD is fabricated to improve the trench sidewall interface quality for all trench-angle devices, which verifies the effectiveness of the proposed OSIQ strategy and its related enhanced electro-thermal performance. The increasing trend of current density with different pre-voltage stress and pre-voltage-stress time of PSTD is also exhaustively investigated, and the [100] one shows a more improved and advantageous current rate compared to [010] one with the same chip size after the stress. Further, the mechanism of the proposed OSIQ has also been revealed. This strategy featuring ferroelectrics to alleviate the trench etching damage could further effectively improve the electro-thermal co-design capability of trench β-Ga₂O₃ trench SBDs.

Project Support

      This work was supported in part by the NSFC under Grant 62204187 and in part by the Innovation Fund of Xidian University under Grant XJS221114.

Fig. 1. Schematic cross section of (a) PSTD and (b) HSTD.

Fig. 2. Fabrication process of the trench STDs. (a) Cathode, (b) First anode and trench etching, (c) Dielectric deposition, (d) Dielectric open, and (e) Anode.

Fig. 3. Scanning electron microscopy image of (a) PSTD and (b) HSTD.

Fig. 4. Forward I–V characteristics of (a) HSTD, (b) PSTD, and (c) B-V characteristics of HSTD and PSTD.

Fig. 5. Forward I–V characteristics of HSTD with different pre-voltage stress and same pre-voltage stress time 2 ms (a) along [010] direction, (b) along [100] direction, and (c) current density of HSTD (@8 V) with different pre-voltage stresses.

Fig. 6. Forward I–V characteristics of PSTD with different pre-voltage stress and same pre-voltage stress time 2 ms (a) along [010] direction, (b) along [100] direction, and (c) current density of PSTD (@8 V) with different pre-voltage stresses.

Fig. 7. Forward I–V characteristics of PSTD along [010] direction with different pre-voltage stress times under different pre-voltage stresses (a) 14 V, (b) 16 V, (c) 18 V, and (d) 20 V.

Fig. 8. Forward I–V characteristics of PSTD along [100] direction with different pre-voltage stress times under different pre-voltage stresses (a) 14 V, (b) 16 V, (c) 18 V, and (d) 20 V.

Fig. 9. Current density (@8 V) of PSTD with different pre-voltage stress under different pre-voltage stress times compared with HSTD along [010] direction without pre-voltage stress (a) [010] PSTD and (b) [100] PSTD.

Fig. 10. (a) P-V and (b) I–V hysteresis curves of the MHM structure.

DOI :

10.1109/JESTPE.2024.3402969