【Patenes】Gallium Oxide Patent Weekly Report (Issue 18, November)

      To further strengthen information exchange within the gallium oxide industry and help stakeholders stay informed of the latest technological developments, the Asian Gallium Oxide Alliance (AGOA) has launched the Gallium Oxide Patent Weekly column. This series will continuously compile and publish newly disclosed patent applications and technological advances in the gallium oxide field.

      As an important indicator of technological innovation, patents reflect R&D trends and strategic layout across the industrial chain. This column focuses on crystal growth, material preparation, defect engineering, device development, process optimization, and emerging applications, providing enterprises, universities, and research institutes with insights into technology trends while supporting the continued development of the gallium oxide industry.

      This eighteenth issue reviews gallium oxide-related patent applications published during the first weeks of November 2026 (November 2–November 6).

β-Gallium Oxide Nanosheets: Preparation Method and Applications (Published on November 3)

      According to information released by the China National Intellectual Property Administration (CNIPA), the Chaozhou Branch of the Guangdong Laboratory of Chemistry and Fine Chemicals has filed a patent application titled “β-Gallium Oxide Nanosheets, Preparation Method, and Applications.” The publication number is CN123026245A, and the application number is 2026114796279.

      The invention discloses a method for preparing β-gallium oxide nanosheets. Gallium nitrate hydrate is first added to a solvent and stirred to form a mixture, followed by the addition of urea and a graphene oxide dispersion. The pH is then adjusted to initiate the reaction. After the reaction, the resulting product is cooled, centrifuged, washed, and freeze-dried before being calcined to obtain β-gallium oxide nanosheets. The invention also discloses the morphological characteristics and potential applications of the nanosheets.

      The preparation method employs a one-step solution precipitation process to produce the precursor. By leveraging the spatial confinement effect of a two-dimensional graphene oxide template in combination with a controllable hydrolysis and precipitation strategy in the liquid phase, the reaction can be completed under mild conditions at low temperature and atmospheric pressure, without the use of a catalyst. No additional reactants need to be introduced during the process. The method features a simple process, safe and controllable operation, and low production costs. The resulting material is expected to find applications in semiconductor power devices, photodetectors, photocatalysts, electrochemical energy storage, and other fields.

Preparation Method for κ-Phase Gallium Oxide Thin Films (Published on November 3)

      According to information released by the China National Intellectual Property Administration (CNIPA), Hunan University has filed a patent application titled “Preparation Method for κ-Phase Gallium Oxide Thin Films.” The publication number is CN123035875A, and the application number is 2026110120835.

      The invention falls within the field of semiconductor material preparation and modification technologies and relates to a method for preparing κ-phase gallium oxide thin films. The method involves irradiating at least one region of an amorphous gallium-based oxide thin film with a spherical aberration-corrected electron beam under vacuum. Irradiation is stopped once the characteristic diffraction spots of the κ phase become clear and stable, yielding the κ-phase gallium oxide thin film. The electron beam has a dose rate of 8,000–11,000 e·Å⁻²·s⁻¹ and an energy of 250–500 keV.

      The κ-phase gallium oxide prepared by this method exhibits clear and continuous lattice fringes. Its selected-area electron diffraction (SAED) pattern shows sharp diffraction spots, indicating good crystallographic orientation and high crystal quality. No signs of transformation to the β phase were observed after 30 days of storage at room temperature, demonstrating good room-temperature stability and the potential to meet the requirements of practical device applications.

Semiconductor Device and Power Conversion Device (Published on November 3)

      According to information released by the China National Intellectual Property Administration (CNIPA), Mitsubishi Electric Corporation has filed a patent application titled “Semiconductor Device and Power Conversion Device.” The publication number is CN123037011A, and the application number is 2024800897983.

      The invention relates to a semiconductor device incorporating a metal-oxide-semiconductor field-effect transistor (MOSFET). The device comprises: a gallium oxide layer of a first conductivity type; a first gallium oxide region selectively formed in an upper portion of the gallium oxide layer and containing acceptor-type impurities; a second gallium oxide region of the first conductivity type selectively formed in an upper portion of the first gallium oxide region; an oxide semiconductor layer of a second conductivity type, made of an oxide semiconductor material different from gallium oxide and formed in a trench extending from the surface into the gallium oxide layer; and a main electrode arranged in contact with both the second gallium oxide region and the oxide semiconductor layer.

Gallium Oxide/Tungsten Diselenide Heterojunction Photodetector and Preparation Method (Published on November 6)

      According to information released by the China National Intellectual Property Administration (CNIPA), North University of China has filed a patent application titled “Gallium Oxide/Tungsten Diselenide Heterojunction Photodetector and Preparation Method.” The publication number is CN123056452A, and the application number is 2026115368606.

      The patent application discloses a gallium oxide/tungsten diselenide (WSe₂) heterojunction photodetector and its preparation method. The photodetector comprises: a gallium oxide layer of a first conductivity type; a passivation layer with an opening that exposes the gallium oxide layer; a first WSe₂ thin film of a second conductivity type, at least part of which directly contacts the gallium oxide layer through the opening to form a first heterojunction; a second WSe₂ thin film of the first conductivity type, at least part of which directly contacts the first WSe₂ thin film to form a second heterojunction; and first and second electrodes electrically connected to the gallium oxide layer and the second WSe₂ thin film, respectively.

      Through the synergistic effect of two built-in electric fields, the proposed structure significantly enhances the separation efficiency of photogenerated carriers, improving photoresponsivity and response speed. It also effectively addresses lattice mismatch, enhances device performance, reduces surface states and dark current, and suppresses leakage pathways.

Water-Cooled Directional Solidification Apparatus and Method for β-Gallium Oxide Single-Crystal Growth (Published on November 6)

      According to information released by the China National Intellectual Property Administration (CNIPA), Beijing Mingjia Semiconductor Co., Ltd. has filed a patent application titled “Water-Cooled Directional Solidification Apparatus and Method for β-Gallium Oxide Single-Crystal Growth.” The publication number is CN123043624A, and the application number is 2026113648250.

      The invention discloses an apparatus and method for growing β-gallium oxide single crystals by water-cooled directional solidification. In the apparatus, a material hopper passes through the top wall of a furnace body, while a thermal insulation structure is installed inside the furnace body and contains a growth chamber. The growth chamber comprises a heating section and a melt section. A feeding structure passes through the top wall of the growth chamber and contains a feed channel. The inlet at the upper end of the channel connects to the discharge outlet at the bottom of the material hopper, while the outlet at the lower end is located within the heating section.

      A tray is positioned in the melt section and is provided with a fixed seed crystal mounting position aligned with the feed outlet. A water-cooled rod passes through the bottom walls of both the furnace body and the growth chamber. The rod can slide vertically and rotate around its vertical axis, and its upper end supports the tray. A cooling water channel is provided inside the rod. A temperature sensor monitors the temperature in the melt section, while a heating structure controls the temperature in the heating section.

      The invention completely eliminates the need for iridium crucibles and iridium heating elements, thereby reducing production costs and significantly lowering the heavy-metal impurity content in the resulting single crystals.

Gallium Oxide Insulated-Gate Bipolar Transistor with a p-Type AlN-Based Heterojunction Collector (Published on November 6)

      According to information released by the China National Intellectual Property Administration (CNIPA), Xidian University has filed a patent application titled “Gallium Oxide Insulated-Gate Bipolar Transistor with a p-Type AlN-Based Heterojunction Collector.” The publication number is CN123056402A, and the application number is 2026112860482.

      The invention relates to transistor technology, particularly a gallium oxide insulated-gate bipolar transistor (IGBT) with a p-type AlN-based heterojunction collector. To address the lack of p-type doping in gallium oxide and the difficulty of achieving bipolar conduction in conventional gallium oxide devices, the invention proposes a new IGBT structure featuring a p-type AlN-based heterojunction collector.

      The AlN/Ga₂O₃ heterointerface enables hole injection from the collector and conductivity modulation in the drift region. This approach is intended to overcome the limitations on on-resistance imposed by the unipolar conduction mechanism of gallium oxide devices, while improving the interface quality of the collector junction and device reliability.

Rapid Thermal Processing Method for Gallium Oxide Crystals, Uses Thereof, Gallium Oxide Crystals, and Method for Improving Gallium Oxide Crystal Quality (Published on November 6)

      According to information released by the China National Intellectual Property Administration (CNIPA), Tsinghua University has filed a patent application titled “Rapid Thermal Processing Method for Gallium Oxide Crystals, Uses Thereof, Gallium Oxide Crystals, and Method for Improving Gallium Oxide Crystal Quality.” The publication number is CN123043642A, and the application number is 2026111604116.

      The invention relates to a rapid thermal processing method for gallium oxide crystals, its applications, gallium oxide crystals, and a method for improving gallium oxide crystal quality. The rapid thermal processing method involves heating a gallium oxide crystal in rapid heating equipment at a rate of 1–300°C/s to a holding temperature of 500–1,400°C, maintaining that temperature for 1–600 seconds, and then rapidly cooling the crystal at a rate of 1–300°C/s.

      This method can improve defect contrast and streak-like features in X-ray topography (XRT) images within a relatively short processing time, while maintaining a broad process window and strong compatibility with industrial production. After treatment, the gallium oxide crystal exhibits reduced contrast of streak-like or line-like defects, less non-uniformity in band-like contrast, and improved overall contrast uniformity in XRT images compared with the untreated crystal.

      The rapid thermal processing method can be used in the preparation of gallium oxide epitaxial substrates and power device substrates, insulating or semi-insulating templates, and ultraviolet photodetector substrates, as well as for defect screening and crystal quality improvement.

Gallium Oxide Ultraviolet Optoelectronic Synaptic Device, Control System, and Preparation Method (Published on November 6)

      According to information released by the China National Intellectual Property Administration (CNIPA), Hangzhou International Innovation Center of Zhejiang University has filed a patent application titled “Gallium Oxide Ultraviolet Optoelectronic Synaptic Device, Control System, and Preparation Method.” The publication number is CN123056451A, and the application number is 2026109693018.

      The patent application discloses a gallium oxide ultraviolet optoelectronic synaptic device, its control system, and a preparation method. The device comprises a substrate, a silicon carbide conductive layer, and a gallium oxide absorption layer stacked sequentially. The silicon carbide conductive layer serves as a carrier transport layer and forms a heterojunction with the gallium oxide absorption layer.

      A trench extending into the silicon carbide conductive layer is etched into the gallium oxide absorption layer, and an electrode is fabricated within the trench. The trench electrically isolates the electrode from the gallium oxide absorption layer. This design aims to address the technical challenge of simultaneously achieving deep-ultraviolet detection and optoelectronic synaptic modulation.

      In addition to patents focusing on gallium oxide materials, several patents published this week also involve the application of gallium oxide as a functional material in other fields, which are provided for readers’ reference.

A Quantum-Kernel Residual-Based Method for Screening Metal/Gallium Oxide Contact Resistivity (Published on November 3)

      According to information released by the China National Intellectual Property Administration (CNIPA), Zhejiang University has filed a patent application titled “A Quantum-Kernel Residual-Based Method for Screening Metal/Gallium Oxide Contact Resistivity.” The publication number is CN123033631A, and the application number is 2026114727207.

      The invention discloses a method for screening metal/gallium oxide contact resistivity based on quantum-kernel residuals. To address the high cost of obtaining high-fidelity transport labels and the limited number of labeled samples under fixed doping concentrations and interface templates, the method constructs a joint query score based on the boundary characteristics of candidate elements, distribution gain, batch diversity, and physical prior knowledge, thereby identifying samples for priority labeling.

      A first-level residual is constructed using material-level leave-one-out baseline predictions. Following standardization, principal component analysis, Pauli-Z phase encoding, fidelity quantum kernel computation, and support vector regression, a quantum-kernel residual prediction is obtained. This prediction is then combined with the baseline prediction to form the quantum-kernel residual regression-based prediction. The method outputs a ranking of candidate metals with low contact resistivity and may additionally provide an applicability-domain status.

      New target values are obtained through external high-fidelity calculations, manual verification, and archiving, after which they can be accessed by subsequent model-training tasks. This approach aims to improve the efficiency of screening low-resistance contact metals under a limited computational budget.