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【Domestic Papers】Research team from the School of Microelectronics, Northwestern Polytechnical University:Simulation on an Advanced Double-Sided Cooling Flip-Chip Packaging with Diamond Material for Gallium Oxide Devices

日期:2024-03-01阅读:227

      Researchers from the School of Microelectronics, Northwestern Polytechnical University have published a dissertation titled "Simulation on an Advanced Double-Sided Cooling Flip-Chip Packaging with Diamond Material for Gallium Oxide Devices" in Micromachines.

Abstract

      Gallium oxide (Ga2O3) devices have shown remarkable potential for high-voltage, high-power, and low-loss power applications. However, thermal management of packaging for Ga2O3 devices becomes challenging due to the significant self-heating effect. In this paper, an advanced double-sided cooling flip-chip packaging structure for Ga2O3 devices was proposed and the overall packaging of Ga2O3 chips was researched by simulation in detail. The advanced double-sided cooling flip-chip packaging structure was formed by adding a layer of diamond material on top of the device based on the single-sided flip-chip structure. With a power density of 3.2 W/mm, it was observed that the maximum temperature of the Ga2O3 chip with the advanced double-sided cooling flip-chip packaging structure was 103 °C. Compared with traditional wire bonding packaging and single-sided cooling flip-chip packaging, the maximum temperature was reduced by about 12 °C and 7 °C, respectively. When the maximum temperature of the chip was controlled at 200 °C, the Ga2O3 chip with double-sided cooling packaging could reach a power density of 6.8 W/mm. Finally, by equipping the top of the package with additional water-cooling equipment, the maximum temperature was reduced to 186 °C. These findings highlight the effectiveness of the proposed flip-chip design with double-sided cooling in enhancing the heat dissipation capability of Ga2O3 chips, suggesting promising prospects for this advanced packaging structure.

Figure 1. Ga2O3 device model.

Figure 2. Simulated packaging model: (a) Wire bonding model; (b) single-sided cooling flip-chip model.

Paper Link:https://doi.org/10.3390/mi15010098