【Device Papers】Simulation of the Single Event Burnout in Lateral Enhancement mode β-Ga₂O₃ MOSFET Devices

      Researchers from the Harbin Institute of Technology have published a dissertation titled "Simulation of the Single Event Burnout in Lateral Enhancement mode β-Ga₂O₃ MOSFET Devices" in IEEE Transactions on Device and Materials Reliability.

Abstract

      This study investigates the single-event burnout (SEB) mechanisms and hardening strategies of beta-gallium oxide (β-Ga₂O₃) enhancement-mode (E-mode) metal-oxide-semiconductor field-effect transistor (MOSFET) through technology computer-aided design (TCAD) simulations. Firstly, the accuracy of the simulation results was verified against relevant literature, and the necessity of including the substrate structure in the SEB simulation was demonstrated. Subsequently, transient analysis reveals a four-stage SEB evolution: (a) The large number of electron-hole pairs (EHPs) generated by heavy-ion incidence drift under the influence of the external field is collected by the electrodes. (b) Under the influence of the high electric field at the gate edge and the transient current induced by heavy ions, impact ionization is triggered, generating new EHPs. (c) The uniformly distributed hole pillars and the auxiliary gate depleted the channel, leading to transient current decay. (d) Substrate holes leave the region beneath the gate and are reduced through recombination, while channel holes accumulate at the gate interface, elevating the gate potential and maintaining the conductive channel until thermal burnout occurs. The thermal burnout in the final stage has been identified as the core process of its SEB. Based on this, we propose a source-connected Schottky body contact (SC-SBC) structure to extract excess holes under the gate in order to verify the SEB mechanism and attempt device hardening design. Simulation results demonstrate that this method effectively drains accumulated gate-region holes, suppresses gate potential elevation, and prevents SEB. The results also verified that the rise in gate potential due to hole accumulation beneath the gate is the fundamental mechanism responsible for SEB in lateral E-mode β-Ga₂O₃ MOSFETs.

DOI：

https://doi.org/10.1109/TDMR.2026.3658196