【Member News】GAREN and Partners’ Academic Achievements (I): Growth, Characterization, and Device Validation of Conductive Ga₂O₃ Substrates

      In recent months, multiple research teams in China have made continued progress in power devices, crystal growth, epitaxial technologies, and defect characterization using Ga₂O₃ substrates and epitaxial wafers supplied by Hangzhou GAREN Semiconductor Co., Ltd. (hereinafter referred to as “GAREN”), as well as through collaborative research with the company. Related results have been published in journals and presented at academic conferences, including IEEE Electron Device Letters and Acta Materialia.

      This three-part series provides a systematic overview of these academic achievements. This first installment focuses on conductive Ga₂O₃ substrates, covering the full chain from the growth of 6-inch single crystals to defect characterization and wafer processing, and ultimately to kilovolt-level device validation.

1.Material Source:6-Inch Single Crystal Grown by the Casting Method

      The growth of large-diameter single crystals is one of the key challenges facing the industrialization of Ga₂O₃. With each additional inch in crystal diameter, the difficulty of crack control and uniformity increases significantly.

      In a paper jointly published by Zhejiang University and Hangzhou GAREN Semiconductor Co., Ltd. [1], a self-developed casting method was used to grow a 6-inch (100)-oriented Ga₂O₃ single crystal. The crystal was grown without cracks while maintaining high crystalline quality and excellent uniformity. The X-ray rocking curve showed a full width at half maximum (FWHM) of less than 60 arcsec, while the surface roughness was below 0.2 nm and the defect density was no more than 4 × 10⁴ cm⁻². The crystal was subsequently processed into on-axis and 4° off-cut substrates.

      This achievement marks a significant advance in large-diameter Ga₂O₃ single-crystal growth technology and provides a reliable material source for the industrialization of domestically manufactured Ga₂O₃ power devices.

2.Quality Assurance:Etching-Based Defect Detection and Processing Technology

      As part of efforts to establish a comprehensive quality evaluation system, Zhejiang University and Hangzhou GAREN Semiconductor Co., Ltd. jointly conducted an electrochemical etching study ^[2] using GAREN’s (100)-oriented Ga₂O₃ substrates as the research material. At room temperature, voltage control was employed to achieve both substrate porosification and defect-selective etching. Under a low bias voltage, randomly distributed porous structures formed on the substrate surface. When the applied voltage exceeded a threshold of approximately 15 V, three types of etch pits could be selectively revealed on the substrate surface, corresponding to voids, strain, and dislocations, respectively. The entire process requires no high-temperature treatment and has almost no impact on the electrical properties of the substrate, providing an intuitive and low-cost approach for defect identification in conductive Ga₂O₃ substrates.

      Another study jointly conducted by Zhejiang University and GAREN ^[3] systematically investigated the effect of off-cut angle on the mechanical properties of Ga₂O₃ substrates. The results showed that, compared with 0° and 4° off-cut substrates, the 6° off-cut substrate exhibited approximately 13% lower hardness and a higher elastic modulus, while causing less processing-induced damage and still meeting the requirements for epitaxial growth. This demonstrates that the off-cut angle is not determined solely by epitaxial growth requirements, but also has a direct impact on wafer-processing yield, providing a direct basis for optimizing substrate processing techniques.

3.Application:Using the Substrate Directly as the Drift Region

      In vertical power devices, the drift region must withstand electric fields at the kilovolt level under low-doping conditions. This role is typically fulfilled by an epitaxial layer, while the substrate primarily serves as a mechanical support. However, in a paper jointly conducted by the Ningbo Institute of Materials Technology & Engineering, Chinese Academy of Sciences, Yongjiang Laboratory, and Hangzhou GAREN Semiconductor Co., Ltd. ^[4], a low-doped, (100)-oriented Ga₂O₃ substrate supplied by GAREN was used directly as the drift region. This approach places stringent requirements on the substrate’s defect density, doping uniformity, and thickness, which must meet standards comparable to those of epitaxial layers.

      The study introduced a 20 nm indium tin oxide (ITO) interlayer deposited by room-temperature sputtering at the cathode to address the ohmic-contact challenge associated with the low-doped substrate. The resulting contact resistivity was as low as 2.6 × 10⁻⁵ Ω·cm², while the device’s specific on-resistance was reduced from 1580 mΩ·cm² to 26 mΩ·cm². At the same time, the device maintained a breakdown voltage of 1.75 kV and a Schottky barrier height of 0.93 eV, achieving a Baliga’s figure of merit (BFOM) of 117.8 MW/cm².

      The entire process eliminates the need for high-temperature epitaxial regrowth, providing a new approach to the low-cost, large-scale manufacturing of Ga₂O₃ power diodes.

      From 6-inch single-crystal growth to defect detection and processing optimization, and finally to kilovolt-level device validation using the substrate directly as the drift region, these studies form a complete loop spanning growth, quality, and application.

      JiaRen currently provides substrate samples and looks forward to collaborating with more research teams and industry customers on joint development. In the next installment, we will focus on semi-insulating substrates and explore how they support photoconductive switches, radiation-hardened devices, and logic circuits.

References

[1] GAO X, JIN Z, WU D, et al. The growth and characterization of 6-inch (100) β-Ga₂O₃ single crystals grown by a casting method [J]. Journal of Alloys and Compounds, 2026, 1063: 187699.

[2] CAO H, YAN Y, HE J, et al. Porous Ga₂O₃ and defect selective etching via electrochemical path [J]. Semiconductor Science and Technology, 2026, 41: 065004.

[3] BI Y, JIN Z, WU D, et al. Impact of miscut angles on mechanical properties and surface damage of (100) β-Ga₂O₃ [J]. Semiconductor Science and Technology, 2026, 41: 055009.

[4] TAN Y, LIU N, LIU C, et al. 1.75-kV vertical β-Ga₂O₃ Schottky barrier diodes with room-temperature Ohmic contact formation by a thin ITO interlayer [J]. Applied Surface Science, 2026, 740: 167007.

About Garen Semiconductor

     Hangzhou Garen Semiconductor Co., Ltd. is a global provider of gallium oxide materials and equipment solutions, specializing in the R&D and commercialization of ultra-wide-bandgap semiconductor technologies. The company’s core products include 2–8 inch gallium oxide single crystals and substrates (including the world’s first 8-inch products), vertical Bridgman (VB) gallium oxide crystal growth equipment, and 2–8 inch gallium oxide homoepitaxial wafers (including the world’s first 8-inch products). Garen Semiconductor is dedicated to building a fully integrated “equipment–crystal growth–substrate–epitaxy” industrial ecosystem and providing comprehensive solutions for global customers. The company’s achievements in gallium oxide have been widely recognized and featured by leading media outlets, including People’s Daily, Xinhua News Agency, Science and Technology Daily, Sina Finance, China Blue News, and The Paper.

For more information, please visit the official website: http://garen.cc/

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Mr. Jiang
Phone: +86 159 1871 9807
Email: jiangjiwei@garen.cc

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Email: xianing@garen.cc