Gallium oxide (Ga2O3) has emerged as a promising candidate for ultra-wide bandgap semiconductors for power devices due to its high breakdown field, large Baliga's figure of merit, and cost advantage of large size bulk crystals over SiC and GaN. Trench technology has been widely used to develop the MOSFET structure to reduce internal resistance. Due to the absence of p-type doping Ga2O3, the trench gate process is adopted as one of the effective methods to decrease the n-channel thickness to ensure the channel is fully depleted under zero gate bias voltage to implement Enhancement-mode Ga2O3 MOSFETs.
Trench gate β-Ga2O3 MOSFETs have gained increasing attention. This paper provides a comprehensive review of the recent progress in trench gate β-Ga2O3 MOSFETs, including vertical and planar MOSFET structures. Besides material properties and crystal growth, the device design and fabrication process of trench gate β-Ga2O3 MOSFET are discussed. The review of device performance involves the static characteristics, temperature-dependent, radio frequency, and switching properties of various trench gate β-Ga2O3 MOSFETs.
Figure 1. Theoretical limits of on-resistances as a function of breakdown voltage for major semiconductors and β-Ga2O3.
Figure 2. (a), (b) Schematic illustrations and (c) SEM image of vertical β-Ga2O3 trench gate MOSFET.
Figure 3. Fabrication process of vertical β-Ga2O3 trench gate MOSFET. (1) Epitaxial layers grown on β-Ga2O3 substrate by HVPE. (2) Form the trench by ICP-RIE etching and photolithography. (3) ALD HfO2 gate dielectric film. (4) Deposit gate metal Cu by electron beam evaporation. (5) Deposit SiO2 film by RF sputtering and remove Cu, HfO2 and SiO2 films on top of the mesa by chemical mechanical polishing (CMP). (6) Remove Cu on the trench sidewalls and SiO2 film by wet etching. (7) Form SiO2 isolation layer by RF sputtering and CMP. (8) Deposit source and drain metals (Ti/Au) and annealing.
Paper Link:https://iopscience.iop.org/article/10.1088/2631-8695/acc00c